Cornelis Networks, Inc.: PCIe ASIC Design Engineer
Source: weworkremotely
About Cornelis Networks
Cornelis Networks delivers the world’s highest performance scale-out networking solutions for AI and HPC datacenters. Their architecture integrates hardware, software, and system-level technologies to maximize the efficiency of GPU, CPU, and accelerator-based compute clusters at any scale. They are committed to innovation, performance, and scalability, solving demanding computational challenges with next-generation networking solutions.
Cornelis Networks is a fast-growing team with a proven track record. As a global organization, their team spans multiple U.S. states and six countries, with onsite, hybrid, and fully remote roles available.
About the Role
Cornelis Networks is hiring a Senior ASIC Design Engineer to lead the design and integration of PCIe controllers into their next-generation SoCs. The ideal candidate will have deep expertise in PCI Express protocol (Gen4/Gen5/Gen6), integration into high-performance ASICs, emulation, and post-silicon bring-up.
Key Responsibilities:
- Own end-to-end integration of PCIe IP into complex ASIC designs.
- Collaborate with IP vendors, architecture, verification, physical design, and software teams to deliver robust PCIe subsystems.
- Drive performance optimization efforts across the PCIe stack, from PHY tuning to DMA/transaction layer efficiency.
- Contribute to system architecture and microarchitecture discussions with a focus on IO and interconnect scalability.
- Lead silicon bring-up and validation of PCIe links in the lab; work closely with board and firmware teams.
- Debug functional and performance issues at RTL, gate-level, and silicon.
- Ensure compliance with PCIe specifications and participate in interoperability testing where needed.
- Provide mentorship to junior engineers and help define PCIe subsystem development best practices.
- Good understanding of high-bandwidth, low-latency connectivity for high-performance compute platforms
Minimum Qualifications:
- BS/MS in Electrical Engineering, Computer Engineering, or related field.
- 10+ years of industry experience in ASIC/SoC design with a focus on PCIe controller integration.
- Proven experience in silicon bring-up and debug of high-speed interfaces.
- Solid understanding of PCIe protocol stack (PHY, MAC, TLP, DLL), configuration space, and link training.
- Hands-on experience with PCIe verification environments, performance tuning, and power-aware design.
- Familiarity with PCIe compliance testing, simulation tools (e.g., VCS, Questa), and lab equipment (e.g., protocol analyzers, oscilloscopes).
- Strong scripting (Python, Perl, TCL) and debugging skills.
- Strong verbal and written communication skills.
Preferred Qualifications:
- Experience with PCIe Gen5/Gen6 and advanced retimer or switch solutions.
- Exposure to CXL, CCIX, or other cache-coherent interconnects.
- Background in data center or AI/ML accelerator architectures.
- Experience with emulation and prototyping platforms (e.g., ZeBu, Palladium, HAPS) for PCIe subsystem validation.
Location:
This is a remote position for employees residing within the United States.
Compensation & Benefits:
Cornelis Networks offers a competitive compensation package that includes equity, cash, and incentives, along with health and retirement benefits.
Your base salary will be determined by factors such as your skills, qualifications, experience, and location. Depending on your role, you may also be eligible for performance-based incentives, including an annual bonus or sales incentives.
In addition to your base pay, you’ll have access to a broad range of benefits, including:
- Medical, dental, and vision coverage
- Disability and life insurance
- Dependent care flexible spending account
- Accidental injury insurance
- Pet insurance
- Generous paid holidays
- 401(k) with company match
- Open Time Off (OTO) for regular full-time exempt employees
- Sick time, bonding leave, and pregnancy disability leave
To Apply:
https://weworkremotely.com/remote-jobs/cornelis-networks-inc-pcie-asic-design-engineer