Cornelis Networks, Inc.: Senior ASIC Ethernet Design Engineer
About Cornelis Networks:
Cornelis Networks delivers the world’s highest performance scale-out networking solutions for AI and HPC datacenters. Their architecture integrates hardware, software, and system-level technologies to maximize the efficiency of GPU, CPU, and accelerator-based compute clusters at any scale. They are backed by top-tier venture capital and strategic investors and are committed to innovation, performance, and scalability.
They are a fast-growing, forward-thinking team of architects, engineers, and business professionals. As a global organization, their team spans multiple U.S. states and six countries, with onsite, hybrid, and fully remote roles available.
About the Role
Cornelis Networks is hiring talented Sr. ASIC Design Engineers with deep experience in one or more of the key areas required to build the world-class SoCs to be deployed in high-performance computing, high-performance data analytics, and artificial intelligence interconnect solutions.
Responsibilities
- End-to-end SoC/ASIC development.
- Front-end standard cell ASIC development including RTL development, Design Verification, synthesis, and post-silicon validation.
- Cross-functional collaboration and partnering with internal and external cross-functional teams, across all levels of the corporation.
- Define, implement, debug, and deliver system solutions around purpose-built ASICs.
Preferred Qualifications
- M.S. degree in Computer Engineering, Computer Science, or Electrical Engineering.
- Track record of first-pass success in ASIC and Systems.
- Experience with multiple clock designs and asynchronous interfaces.
Minimum Qualifications
- 15+ years' post-college experience with silicon development.
- 15+ years' post-college experience in digital design with one or more HDL language (System Verilog, Verilog, VHDL).
- 10+ years of relevant experience in networking hardware design, proven expertise in 50G, 100G, 400G Ethernet MAC/PCS protocols, TCP/IP, RDMA/RoCE, IPSec.
- 5 + years' post-college experience in one or more scripting language (TCL, Python, Perl).
- Understanding of Standard Cell ASIC development flow including digital design, IP integration, simulation and synthesis.
- B.S. degree in Computer Engineering, Computer Science, or Electrical Engineering.
Location
This role fully supports remote work for employees residing within the United States, with the flexibility to travel to their Chesterbrook Corporate Center located in Wayne, PA occasionally for in-person collaboration.
Compensation and Benefits
They offer a competitive compensation package that includes equity, cash, and incentives, along with health and retirement benefits.
Your base salary will be determined by factors such as your skills, qualifications, experience, and location relative to the hiring range for the position. Depending on your role, you may also be eligible for performance-based incentives, including an annual bonus or sales incentives.
In addition to your base pay, you’ll have access to a broad range of benefits, including:
- Medical, dental, and vision coverage
- Disability and life insurance
- Dependent care flexible spending account
- Accidental injury insurance
- Pet insurance
- Generous paid holidays
- 401(k) with company match
- Open Time Off (OTO) for regular full-time exempt employees
- Sick time, bonding leave, and pregnancy disability leave
Equal Opportunity Employer
Cornelis Networks is an equal opportunity employer.
To Apply
https://weworkremotely.com/remote-jobs/cornelis-networks-inc-senior-asic-ethernet-design-engineer